1. Field of the Invention
The invention relates in general to a computer, and more particularly to a main board and a method for dynamically configuring peripheral component interconnect express (PCIE) ports thereof.
2. Description of the Related Art
Referring to FIG. 1, a schematic diagram of a conventional main board is shown. Conventional main board 10 comprises a read only memory (ROM) 13 and a chipset 14. The chipset 14 combines conventional South-bridge chip and North-bridge chip, and is realized by such as the Cougar Point series provided by Intel. The chipset 14 further comprises a Management Engine (ME) controller 141 and several peripheral component interconnect express (PCIE) ports 142. The ROM 13 stores a default configuration data and a basic input/output system (BIOS). The Management Engine controller 141 reads the default configuration data from the ROM 13 to perform a default initialization configuration on the PCIE ports 142. Then, the chipset 14 again reads the basic input/output system. Detailed descriptions are disclosed in the technical documents of the cougar point series provided by Intel such as in the “Intel 6 series chipset design guide”.
Referring to FIG. 2, FIG. 3, FIG. 4 and FIG. 5, schematic diagrams of the default initialization configuration of PCIE ports are shown. Since the Management Engine controller 141 performs a default initialization configuration on the PCIE ports 142 before the chipset 14 reads the basic input/output system, the default initialization configuration of the PCIE ports 142 can only be one of the four types of default initialization configuration illustrated in FIGS. 2˜5. FIG. 2 shows the default initialization configured with four 1X PCIE ports 142. FIG. 3 shows the default initialization configured with two 2X PCIE ports 142. FIG. 4 shows the default initialization configured with two 1X PCIE ports 142 and one 2X PCIE port 142. FIG. 5 shows the default initialization configured with one 4X PCIE port 142.
However, the default configuration data cannot be updated by the user once determined. The configuration of the PCIE ports 142 of the chipset 14 is limited to one of the four types of default initialization configuration (illustrated in FIGS. 2-5) disclosed in Intel specifications. Thus, the chipset 14 cannot dynamically update the configuration of the PCIE ports 142 according to the actual situation of card insertion on the main board.